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TECHNICAL
SPECIFICATION
MODEL NO. : P64AN2AP04
Customer's Confirmation Date
By
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PVI's Confirmation
Confirmed By
Prepared By
3,LI SHIN RD. 1,SCIENCE-BASED INDUSTRIAL PARK,HSINCHU,TAIWAN,R.O.C. http://www.pvi.com.tw
PRIME VIEW INTERNATIONAL CO.,LTD.
Date : Apr. 14,1999 This technical specification is subject to change without notice. Please return 1 copy with your signature on this page for approval.
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TECHNICAL SPECIFICATION CONTENTS
NO.
1 2 3 4 5 6 7 8 9 10 11
ITEM
Cover(P64AN2) Contents Application Features Mechanical Specifications Mechanical Drawing of TFT-LCD module Input / Output Terminals Absolute Maximum Ratings Electrical Characteristics Optical Characteristics Reliability Test Block Diagram Packing
PAGE
1 2 3 3 3 4 5 6 8 14 17 18 19 20
-
Revision History
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1. Application
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This technical specification applies to 6.4" color TFT-LCD module, P64AN2. The applications of the panel are car TV, portable TV, multimedia applications and others AV system.
2. Features . Compatible with NTSC and PAL system
. Pixel in stripe configuration . Slim and compact . High Brightness . Optimum Viewing DirectionG 6 o'clock
. Image ReversionG Up/Down and Left/Right
3. Mechanical Specifications
Parameter Screen Size Display Format Active Area Dot Pitch Pixel Configuration Outline Dimension Weight Specifications 6.4 (diagonal) 960N 234 130.6 (H)N 97.3 (V) 0.136 (H)N 0.416 (V) Stripe N 119.8 (H)N 14.3 (D) 156.3 (W) 280 Unit inch dot mm mm mm g
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4. Mechanical Drawing of TFT-LCD Module
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5. Input / Output Terminals
5-1) TFT-LCD Panel Driving Pin No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Symbol HSY FRP CSY VGH VGL VB VR VG GND VDD VSH GND CKC VSY PSI PSC VIY UD RL NP I/O I/O O I I I I I I I I I I I I/O O O I I I I
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Description Horizontal Sync. Input / Output Video Polarity Alternating Signal Composite Sync. Signal Supply Voltage for Gate Driver (Hi level) Supply Voltage for Gate Driver (Low level) Video Signal (Blue) Video Signal (Red) Video Signal (Green) Ground Supply voltage for Controller Supply voltage for source driver Ground Control pin for select I/O signal Vertical Sync. Input/ Output Synchronize Pulse for Decoder Synchronize Pulse for DC-DC Converter Vertical Sync. Input Pin for reset Vertical Counter UP/DOWN Control Right/Left Shift Control NTSC/PAL Input
Remark Note 5-1
Note 5-1 Note 5-3 Note 5-4
Note 5-5 Note 5-6
Note 5-1, 5-2 Note 5-1 Note 5-7 Note 5-8
Note 5-10 Note 5-9 Note 5-11
Note 5-1G Pin 13 (CKC) can select the function for Pin 1 ( HSY ), Pin 3 (CSY), and Pin 14 ( VSY ) . Pin 13 (CKC) Hi Low Pin 1 ( HSY ) HSY Output External H-Sync. Input Pin 3 (CSY) CSY Input External Clock Input Pin 14 ( VSY ) VSY Output External V-Sync. Input
Note 5-1-1: External H-Sync and External V-Sync input pulse can be high going or low going. Note 5-1-2: The pulse width of external H-Sync input is 4.7sO 2 s.
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The pulse width of external V-Sync input is 2H~4H. Note 5-1-3: The pulse length of external input V-Sync of NTSC system is 262HO 4H and PAL system is 312HO 4H. Note 5-1-4: The timing chart of HSY and external H-Sync input:
CKC=1 HSY (Output)
CKC=0
External H-Sync (Input)
Note 5-1-5: If there is any question about CKC=0, please contact PVI. Note 5-2G If CKC=1, the phase lock loop (PLL) is adopted in the LCD module. If CKC=0, the phase lock loop (PLL) is not adopted in the LCD module. If CKC=0, the external clock input frequency of Pin 3 is 18.9 MHz. Note 5-3G VGH TYP.x +20V Note 5-4G VGL TYP.x -5V Note 5-5G VDD TYP.x +5V Note 5-6G VSH TYP.x +14V Note 5-7G The frequency of PSI is 15.75KHz.
63.5s
4.7s
CSY 10s 5V 15.75KHz 0V
Note 5-8G The frequency of PSC is 70KHz or 39KHz(Default is 70KHz). 63.5s CSY PSC 70KHz or 39KHz
5V 0V
Note 5-9 : Default Hi (+5V) for shift Right; Input Low (0V) for inverse (shift Left). Note 5-10: Default Hi (+5V) for DOWN; Low (0V) for UP. Note 5-11 : NTSC=Hi(+5V),PAL=LOW(0V)
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5-2) Backlight driving Pin No 1 2 Symbol VL1 VL2
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Description Input terminal (Hi voltage side) Input terminal (Low voltage side)
Remark Note 5-12
Note 5-12G Low voltage side of backlight inverter connects with Ground of inverter circuits. 5-3) Input / Output Connector A) LCD Module Connector FFC Up Connector 16 Pins or 20 Pins PitchG 1.0 mm B) Backlight Connector JST BHR-03VS-1
Pin No.G 3 PitchG 4 mm
6. Absolute Maximum Ratings:
Parameter Supply Voltage for Source Driver Supply Voltage H Level for Gate Driver L Level Supply voltage for controller DC bias voltage of common electrode Analog input signals Digital input signals Digital output signals Storage Temperature Operation Temperature Note 6-1 : HSY , CSY, VSY , CKC, Note 6-2 : HSY , VSY , PSI, PSC Symbol VSH VGH VGL VDD Vcom VB,VR,VG MIN. -0.5 -0.3 -7 -0.3 +2 0 -0.5 -0.5 -30 -10 GND = 0 VA Ta = 25 J MAX. Unit Remark +16 V +26.5 V 20 V +6.5 V +6 V 12 V 5.5 V Note 6-1 5.5 V Note 6-2 +80 J +60 J
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7. Electrical Characteristics
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7-1) Recommended Operating Conditions: A)Driving for TFT-LCD Panel Parameter Supply voltage for source driver Supply voltage H Level for gate driver L level Supply voltage for controller Analog input Amplitude voltage DC component Digital input H level voltage L level Digital output H level voltage L level Symbol VSH VGH VGL VDD VB,VR,VG MIN. +13.5 +19 -5.5 +4.7 +2 +4 +2.4 -0.3 +2.4 0 TYP +14 +20 -5 +5 +6 +4 GND = 0VA Ta = 25 J MAX. Unit Remark +14.5 V +24 V -4 V +5.3 V +12 V +8 V +5 V Note 7-1 +0.8 V +5 V Note 7-2 +0.5 V
Note 7-1 : HSY , CSY, VSY , CKC Note 7-2 : HSY , VSY , B) Driving for backlight Parameter Lamp voltage Lamp current Lamp frequency Kick-off voltage Symbol VL IL PL Vs Min. 480 4 20 Typ. 520 6 Max. 560 8 60 1500 Unit Vrms mA KHz Vrms Ta= 25 J Remark IL=6mA Note 7-3 PSI, PSC
Note 7-3 : The wave form of lamp driving voltage should be as closed to a perfect SIN wave as possible. 7-2) Power Consumption Parameter Symbol Conditions Supply current for Gate Driver (Hi level) IGH VGH x +20V Supply current for Gate Driver (Low level) IGL x VGL -5V Supply current for Source Driver ISH VEE x +14V Supply current for controller IDD VDD x +5V LCD Panel Power Consumption Backlight Lamp Power Consumption Note 7-4G The power consumption for backlight is not included. Note 7-5G Backlight lamp power consumption is calculated by ILN VL. TYP. 6 5 12 22 0.45 3.12 Ta= 25 J MAX Unit Remark 9 mA 10 mA 15 mA 30 mA W Note 7-4 W Note 7-5
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7-3) Input / Output signal timing chart
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FRP
Black
VR VG VB
White
2.2V 9.2V
Black
5V CSY 0V
f=15.75kHz
Parameter Horizontal Sync. Output Pulse Vertical Sync. Output Pulse Width Phase Difference Rising Time Falling Time Width Phase Difference Phase Difference Rising Time Frequency Polarity Alternating Signal Delay time Falling Time
Symbol THO THP THR THF TVO TVPO TVPE TVR fFRP TFD TVF
MIN. 4.2 0 7.67 -
TYP. 4.7 2 4H 1H 1.5H 7.87 -
MAX. 5.2 0.5 0.5 2 8.07 4 2
Unit g s g s g s g s g s g s g s g s KHZ g s g s
Remarks
H=1/15.75KHZ
odd field even field
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7-4) Display Time Range
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A) When sync. signal of NTSC system is applied. a) Horizontally
12.6 ~ 63.39 g s.
b) Vertical
19 ~ 253 H B) When sync. signal of PAL system is applied.
a) Horizontally
13.0 ~ 63.8 g s b) Vertical 26 ~ 298 H .
CSY
Thp Thp=2 s Typ Tho=4.7 s Typ
TTL Input
HSY
Tho
CMOS Output
FRP
CMOS Output
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EVEN FIELD ODD FIELD FIELD 1
ODD FIELD
NTSC
Vin
524
525
1
2
3
4
5
6
7
8
9
10
21
22
23
24
CSY
HSY
Tvpo=63.5 S Typ Tvpo Tvo=254 S Typ Tvo Th Th=63.5 S Typ CMOS output
VSY
FRP 262 1 2 3 4 5 6 7 18 19 Black 20 21
258
259
260
261
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12V Typ
RGB
White
White
1.12V Typ
Black First Line
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Timing chart of I/O and RGB signal
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EVEN FIELD FIELD 2
Vin
NTSC
262
263
264
265
266
267
268
269
270
271
272
283
284
285
286
ODD FIELD
EVEN FIELD
CSY
HSY
Tvpe=95 S Typ Tvpe Tvo=254 S Typ Tvo
VSY
FRP 263 1 2 3 4 5 6 17 18 19 Black 20
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259
260
261
262
RGB White
White
Black First line
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Timing chart of I/O and RGB signal
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63.5s
(1) Horizontal Timing Sampling Clock: 18.9MHz
Tho=4.7s 50.79s 10.6s 2.1s
(2) Vertical Timing
50.79/63.5=78% Display Time
Vin
NTSC
FIELD 1
ODD FIELD
524 Tvpo=1H Typ Tvpo Tvo=1H Typ Tvo NTSC FIELD 2 EVEN FIELD
525
1
2
3
4
5
6
7
8
9
10
22
23
24
EVEN FIELD
ODD FIELD
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VSY
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Vin
262
26 3 265 266 267 268 269
264
270
271
272
283
284
285
286
ODD FIELD Tvpe=1.5H Typ Tvpe
EVEN FIELD
VSY
Not Display Time 28.5/262.5=11%
Tvo=4H Typ Tvo
Display Time 234/262.5=89% 234 H 18H First Line
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10.5H
28.5H
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8.Optical Characteristics
8-1) Specification: Parameter Viewing Angle
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Contrast Ratio Response time Reflectance Brightness White Chromaticity Lamp Life Time
Symbol Condition Horizontal c Vertical c (to 12 CRU 10 o'clock) c (to 6 o'clock) CR Rise Tr c =0X Fall Tf =0X Ratio R x y +25J
MIN. O 45 10 30 80
TYP. O 55 15 35 120
MAX.
Ta = 25J Unit Remarks deg Note 8-1 deg Note 8-1 deg Note 8-1 Note 8-2 Note 8-4
30 50 250 0.245 0.307 10,000 6.0 300 0.295 0.345 0.357 0.407
ms ms % cd/T
Note 8-3 Note 8-3
hr
Note 8-1: The definitions of viewing angles
normal ( = 0) observer
3
AB C
12
6
LCD panel 9
: Viewing direction
: Viewing angle
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Note 8-2G CR x
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Luminance when Testing point is White Luminance when Testing point is Black ( Testing configuration see 8-2 ) Contrast Ratio is measured in optimum common electrode voltage.
Note 8-3G Topcon BM-7(fast) luminance meter 2X field of view is used in the testing (after 20~30 minutes operation). Lamp Current 6mA Note 8-4: The definition of response time:
White 100% 90% Brightness 10% 0% Tr
Black
White
Tf
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8-2)Testing configuration
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BM-7(fast) Caution: 1. Environmental illumination Q 1 lux 2. Before test CR, Vcom voltage must be adjusted carefully to get the best 500mm CR.
R,G,B signal
input
LCD Backlight
Pattern generator
LCD Display
Testing Point
Testing Point
Pattern A R, G, B Waveform of Pattern A at Testing Point
16ms 16ms
Pattern B
VW
VW=2.2V 0.2V G, B Waveform of Pattern B at Testing Point
16ms 16ms
VB
VB=9.2V 0.2V
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9. Reliability Test
No 1 2 3 4 5 6 Test Item
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Test
Condition
High Temperature Storage Test Low Temperature Storage Test High Temperature Operation Test Low Temperature Operation Test High Temperature & High Humidity Operation Test Thermal Cycling Test (non-operating) Vibration Test (non-operating) -25J
Ta = +80 J, 240 hrs Ta = -30J, 240 hrs Ta = +60 J, 240 hrs Ta = -10 J, 240 hrs Ta = +60J, 95%RH, 240 hrs /+25 J/ +70 5min J, 200 Cycles 30 min
30 min
FrequencyG10 ~ 55 H Z AmplitudeG1.5 mm Sweep time: 11 mins Test period: 2 hrs for each direction of X, Y, Z 8 Shock Test (non-operating) Electrostatic Discharge Test Ta: ambient temperature 100G, 6ms Direction: O X, O Y, O Z Cycle: 3 times 150pF, 330[ 9 10 times/point, 9 points/panel face 7
[Criteria] Under the display quality test conditions with normal operation state, there should be no change which may affect practical display function.
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10. Block Diagram
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Pin 7 6 8 3 13 14 1 15 16 2 4 5 9 10 11 12 17 18 19 20
Symbol VR VB VG CSY CKC VSY HSY PSI PSC FRP VGH VGL GND VDD VSH GND VIY UD RL NP +20V -5V GND +5V +14V GND
Controller
Source Driver
PLL
Level Shift
TFT-LCD Pannel
Vcom
DC/AC Inverter DC/DC Converter
Backlight
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11. Packing
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Revision History
Rev. 1 Issued Date Revised NEW Contents Apr. 14,1999
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